1. Field of the Invention
This invention relates to a memory addressing system for a digital computer which has an associated external memory.
2. Discussion of Prior Art
The amount of memory addressable by a computer is normally limited by the length of the address words generated by that computer An n bit address word can address 2.sup.n memory locations. It is known, for example from EP-A-0057815, to increase the size of the addressable memory by providing memory units which are organised as pages of up to 2.sup.n addressable memory locations, each page comprising a set of one or more blocks of addressable locations, and generating both page selection codes and block selection codes which access one or more of those blocks. A specific address in the selected block is determined by a part of the aforesaid n bit address. Such a procedure is known as memory mapping.
A program may require that a block of memory locations, hereinafter referred to for convenience as the "universal" block, and which holds the program subroutines, should be accessible in combination with each of the other blocks. If such a universal block formed part of a page an appropriate page selection code would require to be generated for the aforesaid universal block, as well as for each other block with which it is to be used in combination, on each occasion. Such a procedure will be time-consuming.
Though the universal block could be accessed, without requiring generation of a page selection code, if that block were duplicated in every page of the memory, such a technique would be wasteful both of addressable space in the memory units and of time required to program each universal block individually.
Alternatively the aforesaid universal memory block may be located in a memory device which is separate from the devices on which the other memory blocks are located and which can be selected independently of the page selection code, whereby no page change operation is required to access the universal block in combination with any other block. This latter approach will require the provision of at least one additional memory device.
It is an object of the invention to provide a computer memory addressing system in which a universal memory block, as above defined, may be accessed without recourse to a page change operation and without the provision of a separate memory unit for that block or duplication of the universal memory block in every page.
According to the invention there is provided a computer memory addressing system comprising a central processor, an external memory consisting of a plurality of memory units each of which contains blocks of memory locations, means for supplying first address signals indicative of sets of selected ones of said blocks, means for supplying second address signals indicative of groups of selected ones of said blocks, and logic circuits responsive to said first and second address signals for generating enabling signals for selected ones of said memory units and for generating signals accessing a required block in an enabled one of said memory units, a block in one of said memory units being accessed by one of said second address signals only.